Principal ASIC Design Engineer - SOC Lead ( Hyderabad )

  • Bengaluru
  • Mulya Technologies

Top10 Semiconductor Organization in the World

Bangalore


We are a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.


BS/MS in E&E or related field with >12 years of experience.


Candidate should have experience to handle and guide teams on End-to-End SOC development cycle like Design, Verification, DFT, Physical design, FPGA prototyping, FW bring up, Characterization, Test, Qual, Packaging, signal Integrity.


Work with Global and third-party teams and drive the requirements closure and delivery alignments and follow up’s.


Ability and experience to drive the critical decisions for the SOC - Process selection, area, power tradeoffs and corresponding architectural choices.


Prior proven hands-on experience with SOC Design and IPs design.


Knowledge and experience with complex SoC designs based on ARM/ARC and hierarchical interconnect.


Experience with UFS (MIPI+UNIPRO), PCIe, DDR, NAND I/F and storage SOC designs (advantage)


Proven experience as full chip lead at least for one project. Excellent problem-solving, communication and leadership skills.



Contact:

Uday

Mulya Technologies

muday_bhaskar@yahoo.com