Senior DFT Engineer

  • Bengaluru
  • Einfochips (an Arrow Company)

Experience of atleast 4 to 10 yrs in DFT.

Hands on experience in various DFT aspects like Scan insertion, MBIST and JTAG, ATPG, Pattern validation at block level as well as Fullchip level

Synopsys tools: DFT MAX, TetraMAX OR Cadence tools: RTL Compiler, Encounter Test OR Mentor Graphics tools: Tessent tool chain, TestKompress - Debussy, VCS/Questa/IUS - PT tool from Synopsys .

Be responsible for a comprehensive DFT plan and drive the implementation

Work with DFT and cross functional teams