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R&D Engineer, Sr. Staff 45214BR INDIA - Hyderabad Job Description and Requirements [R&D Engineer, Staff]AMS Design Methodology ExpertOur Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world’s first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk.Job OverviewPart of the rapidly expanding Hardware-Analytics and Test (HAT) business unit, R&D Engineer, Staff. This technical role is responsible for HDG’s (Hardware Development Group) Analog Design methodology setup to ensure overall productivity improves in terms of cycle time and man-months for the Silicon Lifecycle management Ips. This includes ensuring automated(synopsys EDA flow based) flow setup for blocks like bandgap, temperature sensor, Analog to Digital converters, Oscillators and many other mixed signal Ips from scratch in latest technology nodes. The person need to be a expert of analog design with innovative mindset and automation skills. Work will include working with Analog and Digital for setting up the right methodology for both Front end and backend.Responsibilities and DutiesResponsible for Analog design for MSIPs for appropriate methodology Hands on with automations around Synopsys EDA flowWork out innovative design methodologies to overcome challengesUnderstand AMS Ips and ensure best cycle time for executionAnalyse pros and cons of different flow for Design, verification , layout and IP integrationWork closely with silicon characterization team to ensure DFT and Analog testability is part of the design flowQualificationsBS or MS degree in Electrical Engineering/Computer Science/Computer Engineering.8 to 11 years of experience in the fields of Analog/Mixed Signal design for leading edge technologiesInnovation mindset with automation in SKILL , Perl , Python , C++ Knowledge with System Verilog and MATLAB will be good to have Ability to work with cross functional team spread across different geographies Preferred Skills Demonstrated experience with Analog/Mixed Signal Design and methodology expertiseUnderstanding latest foundry PDKs and their technical collaterals as required by the Analog & Digital design teams including their usage in design and layoutThorough knowledge of AMS design flow with digital top SOC integration methodologyClosely work with Analog layout team by reviewing and enabling Layout methodology (automations) Location: To be hired for Bangalore or BhubaneswarABOUT USSynopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for creative companies developing the electronic products and software applications we rely on every single day. As the world’s 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you’re a system-on-chip (SoC) designer building advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver exceptional, secure products for the era of connected everything. The company is headquartered in Mountain View, California, and has approximately 113 offices located throughout North America, South America, Europe, Japan, Asia and India.Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every single day.Synopsys considers all applicants for employment without regard to race, color, religion, sex, gender preference, national origin, age, disability, or status as a Covered Veteran in accordance with federal law. In addition, Synopsys complies with applicable state and local laws prohibiting discrimination in employment in every jurisdiction in which it maintains facilities. Synopsys Inc. also provides reasonable accommodation to individuals with a disability in accordance with applicable laws. Job Category Engineering Country India Job Subcategory R&D Engineering Hire Type Employee R&D Engineer, Sr. Staff | Synopsys